Article Details

Abstract

With the development of quantum computing, traditional public-key cryptosystems face severe challenges. The lattice-based Kyber algorithm standardized by NIST is the core standard for key encapsulation mechanisms in the post-quantum era. However, the reference implementation of Kyber suffers from low computational efficiency, limited instruction-level parallelism, and high memory-access overhead on resource-constrained ARM embedded platforms. To address these bottlenecks, a microarchitecture-oriented implementation optimization study is carried out. A Union-based dual-view data layout and a cache-line alignment strategy are adopted, together with an eight-way parallel Number Theoretic Transform (NTT) based on ARM NEON (Advanced SIMD) and a loop-unrolling method for Keccak. Experiments are performed on a Rockchip RK3399 (ARM Cortex-A72) platform. Results show that the CPU cycles of key generation, encapsulation, and decapsulation are reduced by 55.6%～62.4%, while the throughput increases by 125.2%～166.1% across different security levels. The study demonstrates that coordinated optimization of data layout and instruction-level parallelism can significantly improve the deployment efficiency of post-quantum cryptography on resource-constrained platforms.

Keywords

PQC; Kyber; ARM architecture; NEON vectorization; performance optimization

References

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About the authors

Chang Minghe (2002-), male, Han ethnicity, from Jinzhong, Shanxi, master's student, research interests include cryptography.