Design of ARINC453 Bus Receiver Based on FPGA
(AVIC Xi'an Aeronautics Computing Technique Research Institute, Xi'an 710068, China)
Abstract
To meet the high-reliability and real-time data transmission requirements of the ARINC453 bus between the meteorological operation aircraft mission system and the airborne meteorological radar, a dedicated receiver based on FPGA is designed. With Xilinx Spartan-3 FPGA as the core, following the ARINC453 protocol and ARINC708 electrical specifications, a modular design is adopted to implement the full-process processing of meteorological radar data acquisition, decoding, synchronous detection, parsing, and verification, replacing traditional dedicated chips to solve the problems of poor adaptability and difficulty in customization. The logic design is completed based on VHDL, and hardware verification shows that the receiver works stably at a standard clock of 1 MHz, with a frame synchronization accuracy rate of 100%. It can accurately receive meteorological radar echoes, detection parameters, and other data, adapt to the customization requirements of radar equipment interfaces, and meet the reliability requirements of the data transmission link in meteorological operation scenarios.
Keywords
ARINC453 bus; FPGA; receiver; Manchester decoding; frame synchronization detection
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About the authors
Liu Taoyu (1990-), male, Han nationality, from Shangluo, Shaanxi, engineer, master's degree, research direction: hardware design of airborne computers.