Design and Implementation of a Partitioned Backlight System with Grayscale Dynamic Adjustment Based on FPGA
(Jiangsu University of Technology, Changzhou 213001, China)
Abstract
This paper proposes a design and implementation scheme for a partitioned backlight system with grayscale dynamic adjustment based on FPGA, aiming to address the issues of rough brightness control, insufficient image contrast, and high energy consumption in current display technologies and control algorithms via FPGA's high efficiency. The scheme dynamically controls the global and local brightness of the Mini-LED backlight panel through grayscale processing, partitioned division, weighted calculation, and integration with illuminance values of external ambient light intensity. Taking full advantage of FPGA's parallel computing capability, the design achieves finer partitioned division and obtains accurate backlight data through comprehensive calculation. Experiments show that the system enables independent and precise adjustment of backlight for each partition, effectively enhancing image contrast and display quality while significantly reducing energy consumption.
Keywords
FPGA; grayscale; partitioned backlight; illuminance value; dynamic adjustment
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Funding
National Natural Science Foundation of China Youth Project (12304477); Changzhou City Leading Science and Technology Research Project (2022005); Enterprise horizontal projects (KYH22272, KYH23019)
About the authors
Xie Yichen (2002-), male, Han ethnicity, born in Nanjing, Jiangsu, is currently pursuing a master's degree in instrumentation control technology and embedded systems; Corresponding author: Cui Yuan (1982-), male, Han ethnicity, from Changzhou, Jiangsu, associate professor, PhD, research direction: circuits and systems.